• ×ÊÖʺËÑéÒѺËÑéÆóÒµÓªÒµÖ´ÕÕ
µ±Ç°Î»Öãº
Ê×Ò³>
¹©Ó¦²úÆ·>
EVG?810LT Series LowTemp? Plasma Activation System
΢ÐÅÁªÏµ
ɨһɨ
Ìí¼ÓÉ̼Ò΢ÐÅ
ÁªÏµ·½Ê½ ÔÚÏßÁªÏµ

EVG?810LT Series LowTemp? Plasma Activation System

Ä¿Ç°½øµÄÑÚÄ£¶Ô×¼Æ÷µÄÐÔÄÜÏÞÖÆ?·Ö±æÂʵÍÖÁ0.5¦Ìm-2¦Ìm£¨Ñз¢£©?·Ö±æÂʵÍÖÁ2¦Ìm-5¦Ìm£¨HVM£©?²úÁ¿¸ß´ï200+wph

¼Û    ¸ñ

¶©»õÁ¿

  • ÃæÒé ¼Û¸ñΪÉ̼ÒÌṩµÄ²Î¿¼¼Û£¬Çëͨ¹ý"»ñÈ¡×îµÍ±¨¼Û"
    »ñµÃÄú×îÂúÒâµÄÐÄÀí¼Ûλ~

    ²»ÏÞ

ÉÜÏÈÉú
ÓÊÏäÒÑÑéÖ¤
ÊÖ»úÒÑÑéÖ¤
΢ÐÅÒÑÑéÖ¤
𐁴𐁵𐁶 𐁷𐁸𐁶𐁷 𐁶𐁹𐁸𐁷
΢ÐÅÔÚÏß
  • ·¢»õµØ£ºÉ½¶« ëøÖÝÊÐ
  • ·¢»õÆÚÏÞ£º90ÌìÄÚ·¢»õ
  • ¹©»õ×ÜÁ¿£º 10̨
±±¾©ÑǿƳ¿êͿƼ¼ÓÐÏÞ¹«Ë¾ Èëפƽ̨ µÚ6Äê
  • ×ÊÖʺËÑéÒѺËÑéÆóÒµÓªÒµÖ´ÕÕ
  • ÉÜÏÈÉú
    ÓÊÏäÒÑÑéÖ¤
    ÊÖ»úÒÑÑéÖ¤
    ΢ÐÅÒÑÑéÖ¤
  • 𐁴𐁵𐁶 𐁷𐁸𐁶𐁷 𐁶𐁹𐁸𐁷
  • ΢ÐŽ»Ì¸
    ɨһɨ ΢ÐÅÁªÏµ
  • ɽ¶« Ôæׯ
  • Ô­×ÓÁ¦ÏÔ΢¾µ,ɨÃèµç×ÓÏÔ΢¾µ,ÄÉÃ×±íÕ÷,°ëµ¼Ìå¼Ó¹¤É豸

ÁªÏµ·½Ê½

  • ÁªÏµÈË£º
    ÉÜÏÈÉú
  • Ö°   Î»£º
    ÏîÄ¿¾­Àí
  • ÊÖ   »ú£º
    𐁴𐁵𐁶𐁷𐁸𐁶𐁷𐁶𐁹𐁸𐁷
  • µØ   Ö·£º
    ɽ¶« Ôæׯ ëøÖÝÊÐ ÏèÓî¹ú¼Ê
¼Ó¹¤¶¨ÖÆ£ºÊÇÆ·ÅÆ£ºEVGÐͺţºEVG?810
ÓÃ;£º¾§Ô²¼üºÏƽ̨ÊÇ·ñ¿ç¾³»õÔ´£º·ñ

EVG?810LT Series LowTemp? Plasma Activation SystemÏêϸ½éÉÜ

EVG®810LT Series |

LowTempâ„¢ Plasma Activation Systems






 


 

EV Group’s LowTemp (LT) Plasma Activated Bonding is available for both R&D and high volume manufacturing. The EVG LowTemp plasma activation chamber was developed for modular operation. It can be configured as single chamber, stand alone, semi-automated unit (EVG810LT) or integrated in an automated configuration for high volume production (EVG850LT and GEMINI).

 

The EVG810LT stand alone LowTemp plasma activation system is suitable for applications such as direct bonding  for manufacturing of SOI (Silicon-on-Insulator), strained silicon, GeOI (Germanium-on-Insulator) wafers as well as for compound semiconductor applications and MEMS devices.

 

On the EVG850LT and GEMINI the plasma activation process is the enabling technology for low temperature bonding for CMOS (e.g. imaging sensors, etc.) and Memory (e.g. Flash, SRAM, etc.) applications.

 






 


 


Surface activation for low temperature bonding (fusion/ molecular and intermediate layer bonding)

Fastest kinetics of any wafer bonding mechanism

No wet processes required

Highest bond strength at low temperature annealing (up to 400 °C)

Applicable for SOI, MEMS, compound semiconductors and advanced substrates bonding

High degree of materials compatibility (including CMOS)

Accommodates various substrate chemistries by allowing the use of different process atmospheres: inert gas, oxidizing or reducing gas mixtures

Low process gas consumption

No contamination issues (particle neutral, metal free) Patented technology

Two platform sizes (up to 200mm wafers and up to 300mm wafers)



ÃâÔðÉùÃ÷£º
±¾Ò³ÃæËùÕ¹ÏֵĹ«Ë¾ÐÅÏ¢¡¢²úÆ·ÐÅÏ¢¼°ÆäËûÏà¹ØÐÅÏ¢£¬¾ùÀ´Ô´ÓÚÆä¶ÔÓ¦µÄÉÌÆÌ£¬ÐÅÏ¢µÄÕæʵÐÔ¡¢×¼È·ÐԺͺϷ¨ÐÔÓɸÃÐÅÏ¢À´Ô´ÉÌÆ̵ÄËùÊô·¢²¼ÕßÍêÈ«¸ºÔ𣬹©Ó¦ÉÌÍø¶Ô´Ë²»³Ðµ£Èκα£Ö¤ÔðÈΡ£
ÓÑÇéÌáÐÑ£º
½¨ÒéÄúÔÚ¹ºÂòÏà¹Ø²úÆ·Ç°Îñ±ØÈ·ÈϹ©Ó¦ÉÌ×ÊÖʼ°²úÆ·ÖÊÁ¿£¬¹ýµÍµÄ¼Û¸ñÓпÉÄÜÊÇÐé¼ÙÐÅÏ¢£¬Çë½÷É÷¶Ô´ý£¬½÷·ÀÆÛÕ©ÐÐΪ¡£
 
½¨ÒéÄúÔÚËÑË÷²úƷʱ£¬ÓÅÏÈÑ¡Ôñ´øÓлò±êʶµÄ»áÔ±£¬¸ÃΪ¹©Ó¦ÉÌÍøVIP»áÔ±±êʶ£¬ÐÅÓþ¶È¸ü¸ß¡£

°æȨËùÓÐ ¹©Ó¦ÉÌÍø(www.gys.cn)

¾©ICP±¸2023035610ºÅ-2

±±¾©ÑǿƳ¿êͿƼ¼ÓÐÏÞ¹«Ë¾ ÊÖ»ú£º𐁴𐁵𐁶𐁷𐁸𐁶𐁷𐁶𐁹𐁸𐁷 µØÖ·£ºÉ½¶« Ôæׯ ëøÖÝÊÐ ÏèÓî¹ú¼Ê